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17-04-2024
Engineering

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Q2 Solve the following [10 marks]
a) Find the dual of A. B.C.D+ A.B.C.D + A.B.C.D.
b) Find the complement of A+ [(B+ C).D+ E]. F.
c) It is proposed to construct an eight-input NAND gate using only two-input AND
gates and two-input NAND gates. Draw the logic arrangement that uses the
minimum number of logic gates. [10 marks]

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